October 9th, 2014 by Lyle Smith
Samsung Begins Mass Production of Industry’s First TLC V-NAND
Samsung has announced that it has begun the mass production of the industry’s first 3-bit multi-level-cell (TLC) 3D V-NAND flash memory for use in SSDs. The 3-bit V-NAND leverages 32 vertically stacked cell layers per NAND memory chip (with each chip providing 128Gb of storage) and is Samsung’s second generation V-NAND package.
Each cell is electrically connected to a non-conductive layer using charge trap flash (CTF) technology inside Samsung’s V-NAND chip structure. In addition, each cell array is vertically stacked on top of one another to form multibillion-cell chips. Samsung indicates that the use of 3 bit-per-cell, 32-layer vertically stacked cell arrays greatly increases the efficiency of memory production. When compared to Samsung’s 10 nanometer-class 3-bit planar NAND flash, this new 3-bit V-NAND has over twice the wafer productivity.
Samsung first introduced its first generation V-NAND (24 layer cells) in August, 2013, and introduced its second generation V-NAND (32-layer) cell array structure back in May of this year. The announcement of Samsung’s 32-layer, 3-bit V-NAND, makes way for a more rapid evolution of V-NAND production technology. Samsung has also shipped a variety of SSDs based on prior iterations of V-NAND like the 845DC Pro and SM1715 NMVe drive.
TLC V-NAND will help to increase SSD adoption for general PC users as well as the ever-growing need for storage in the enterprise. The new NAND technologies continue to put pricing pressure on SSDs, increasing the value of flash over hard drives, especially in the enterprise where 10K and 15K HDDs are being replaced by lower-cost, higher-capacity 2.5" flash drives. This announcement also further enhances Samsung's standing as being the most aggressive in the marketplace to adopt and deploy new NAND technologies.