Intel Announces 56 Core Single-Socket Cooper Lake Processor

Today Intel announced that its future Intel Xeon Cooper Lake processor family will have server-centric versions with up to 56 cores per socket. The new processors have built-in, AI training acceleration.


Today Intel announced that its future Intel Xeon Cooper Lake processor family will have server-centric versions with up to 56 cores per socket. The new processors have built-in, AI training acceleration.

Intel claims that the upcoming 56 core Cooper Lake processors will support bfloat16 and Intel Deep Learning Boost. Bfloat16 is a 16-bit floating point representation with the same dynamic range as a standard 32-bit floating point representations but compressed into half the space. Bfloat16 instructions accelerate AI deep learning training for various workloads such as image-classification, speech-recognition, recommendation engines and machine translation and are currently only available on Intel Xeon 9200 processors. The new processors are expected to have a lower power envelope than the 9200 processors that are available today. Unlike its predecessors which are only available through select OEMs (Atos, HPE, Lenovo, Penguin Computing, and Megware), the upcoming 56 core Cooper Lake processors will be socketable and so will likely be more widely available. 

The switch to a socketable design not only makes the upcoming 56 core Cooper Lake processors easier to get; it also facilitates forward compatibility. Intel has announced that Cooper Lake will have platform compatibility with the upcoming 10nm Ice Lake processor. At this time, we don't expect the Ice Lake processors to support bfloat16.

On the unfortunate news side, we had previously expected Cooper Lake to be out sometime this year, but Intel is now saying the first half of 2020. This is purely speculation, but this might push back the 10nm Ice Lake CPUs to late 2020 or even the year after that. If that happens, it will give AMD even more time to capitalize on already having a 7nm processor.

Availability

Expected first half of 2020.

Intel

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Michael Rink

I'm a content contributor at StorageReview and a senior full stack software engineer. I've led both devops and development teams ranging from single engineer projects to flagship projects requiring triple-digits of engineers with teams spread all across the globe. I also enjoy dancing, writing, reading, making games, and tending to my garden.

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