AMD has introduced the Versal Premium Gen 2 Memory-on-Package (MoP) adaptive SoCs, adding integrated LPDDR5X memory directly into the device package to increase bandwidth while reducing board complexity and footprint. The new devices target applications that require high memory throughput within constrained power and space budgets, including networking, physical AI, aerospace and defense, test and measurement, and professional video systems.
Unlike traditional designs that rely on external DRAM, the Versal Premium Gen 2 MoP architecture integrates up to 32GB of LPDDR5X memory into the package, providing up to 288GB/s of memory bandwidth. According to AMD, the approach reduces board area by up to 60% compared to equivalent external memory implementations while eliminating much of the complexity associated with high-speed memory routing. AMD bases the bandwidth and footprint figures on its Versal Premium Gen 2 MoP 2VP3622 device measured against a monolithic Versal Premium Gen 2 adaptive SoC paired with external memory.
The integrated memory architecture is designed to improve bandwidth, reduce latency, and lower power consumption compared to conventional board-level memory implementations. By removing the need for external LPDDR5X layout, designers can simplify PCB design, reduce validation requirements, and shorten development cycles.
Designed for Edge and Compact Embedded Systems
AMD positions the platform for compact embedded and edge systems with limited board space. The smaller footprint enables designs targeting standards such as EDSFF and 3U VPX, while supporting telecom and defense platforms that often face strict thermal and mechanical constraints.
The devices also integrate PCIe 6.0 and CXL 3.1 hard IP operating at up to 64GT/s, enabling high-speed communication with processors such as AMD EPYC CPUs. Combined with LPDDR5X operating at up to 9,000Mb/s, the architecture is intended to support data-intensive workloads while enabling system architects to expand memory resources through CXL memory pooling and expansion technologies.
For long-lifecycle deployments, AMD states that the Versal Premium Gen 2 MoP family supports industrial operating temperatures ranging from -40°C to 110°C and is backed by more than 15 years of product availability. The company notes that using LPDDR5X instead of HBM helps avoid the shorter refresh cycles common in data center memory products, reducing the likelihood of hardware redesigns due to component availability.
Integrated Security
Security capabilities are also integrated into the platform. PCIe Integrity and Data Encryption (IDE), introduced with PCIe 6.0, protects data moving across PCIe links, while integrated DDR memory encryption secures data stored in memory without consuming programmable logic resources. The devices also include hard 400G High-Speed Crypto Engines for secure, high-bandwidth processing.
AMD summarized the primary design goals as eliminating traditional trade-offs among memory bandwidth, physical footprint, power consumption, and product longevity. By integrating memory directly into the adaptive SoC package, the company says customers can build higher-performance systems while reducing board-level engineering effort and accelerating deployment.
Development can begin immediately with the standard Versal Premium Series Gen 2 devices currently shipping, supported by existing Vivado and Vitis development environments, compatible IP, and reference designs. AMD expects Versal Premium Gen 2 Memory-on-Package devices to begin sampling at the end of 2026, with production shipments planned for the second half of 2027.
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