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AMD et Intel font de oneDNN le chemin x86 par défaut dans PyTorch, intègrent Folding ZenDNN et alignent les extensions de calcul IA

Entreprise  ◇  Logiciels

AMD and Intel announced that they will combine their x86 CPU optimization work for PyTorch in oneDNN, the open-source deep learning library governed by the Unified Acceleration Foundation (UXL), and have aligned on it as the default open-source library for x86 acceleration inside PyTorch. AMD is folding its ZenDNN optimizations into oneDNN and has joined the UXL Foundation as a steering member. The move came on a recommendation from the x86 Ecosystem Advisory Group, and the stated goal is one software path for optimized CPU inference and training across AMD and Intel processors.

Intel Xeon 6 processor on anti-static foam in the StorageReview lab, one of the two x86 CPU families that oneDNN will cover for PyTorch

AMD Integrates ZenDNN Optimizations into oneDNN

Until now, PyTorch on x86 has carried two vendor paths. oneDNN, which began as Intel’s MKL-DNN and now sits under UXL governance, is already the library behind many of PyTorch’s optimized CPU operators, while AMD maintained ZenDNN as a set of EPYC-tuned primitives with a separate PyTorch plug-in. Developers who wanted the best from each vendor’s silicon had to know which library applied and install the right one. Consolidating in oneDNN puts both vendors’ kernels behind the same PyTorch calls.

“AMD is advancing an open software ecosystem that gives developers greater choice and makes it easier to build high-performance AI applications,” said Robert Hormuth, corporate vice president, Architecture and Strategy, AMD. “By working with the x86 Ecosystem Advisory Group, we’re bringing the industry together around common technologies that simplify development across x86 processors.”

AMD EPYC processor render; AMD is folding its ZenDNN optimizations for EPYC into oneDNN so PyTorch uses one library across x86

AMD says it will keep optimizing for its processors as the ZenDNN work lands in oneDNN. Neither company has named the PyTorch release or oneDNN version that carries the consolidated implementation, published a timeline, or given performance figures, so for now the announcement describes integration work in progress. The EPYC 9006 Venice line and Intel’s Rapides du diamant are the newest server parts on each side, and neither company has said which generations get the consolidated path first.

The advisory group behind the recommendation is the body Intel and AMD formed in October 2024 to steer x86 as a shared platform, with Broadcom, Dell, Google, HPE, HP, Lenovo, Meta, Microsoft, Oracle, and Red Hat as founding members. Its charter covers cross-platform compatibility and simpler software development, and the oneDNN alignment follows the ACE specification as the second outcome the two chipmakers have attributed to it.

AI Compute Extensions Support Planned for Future Updates

The second piece of the collaboration is AI Compute Extensions (ACE), a next-generation x86 instruction set that AMD and Intel are defining together through the same advisory group. ACE is built to accelerate matrix multiplication, and the companies say it will reach PyTorch through future oneDNN updates, which is the practical reason for a single library: one integration gets the new instructions to both vendors’ processors.

PyTorch feature graphic listing eager and graph-based execution, dynamic neural networks, distributed training, and hardware accelerated inference, the framework whose x86 CPU path oneDNN will carry

AMD and Intel published the ACE specification through the advisory group earlier this year. It defines outer-product matrix instructions as an additional unit inside the AVX10 engine, with eight 512-bit tile registers, a 1,024-bit block scale register for OCP MX block scaling, and INT8, FP8, MXFP8, MXINT8, and BF16 data types, with conversions covering MXFP4 and MXFP6. ACE appears to software as a new palette under the AMX framework, which lets it reuse the AMX programming model and operating system support, and the specification claims a 16x compute density gain over the equivalent AVX10 multiply-accumulate.

“Developers shouldn’t have to think about separate software paths to get the best from an x86 CPU,” said Jeff McVeigh, vice president and general manager, Data Center Strategic Programs, Intel. “Working with AMD through oneDNN gives the PyTorch community a consistent approach for modern processors and a way to bring future capabilities, including AI Compute Extensions, into the framework.”

Neither company has named the processor generations that will ship ACE, so the oneDNN integration is the software side of a hardware roadmap that is still unannounced. For PyTorch users on x86, the near-term change is in where the optimizations live, and the measurable part, whether a single oneDNN path matches what ZenDNN delivered on EPYC, will have to wait for a release that both companies can point to.

AMD EPYC

Intel Xeon

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Harold Fritt

Je suis dans l'industrie de la technologie depuis qu'IBM a créé Selectric. Ma formation, cependant, est l'écriture. J'ai donc décidé de sortir de l'avant-vente et de revenir à mes racines, en écrivant un peu mais en restant impliqué dans la technologie.