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Stylized render of a multi-die chiplet package on a circuit board, illustrating the modular silicon approach AMD is bringing to Versal
Accessories  ◇  Enterprise

AMD Versal RF Gets Native UCIe 1.1: Six Chiplet Links per Package, Production Parts in Q4 2027

AMD announced that its upcoming Versal adaptive SoCs will natively support Universal Chiplet Interconnect Express (UCIe) 1.1 interfaces. The open industry standard, which Intel is also building into Diamond Rapids and Wildcat Lake, establishes low-power, high-bandwidth die-to-die communication, allowing co-packaged AMD adaptive SoCs to interface directly with specialized silicon. This transition targets the engineering constraints

AI  ◇  Enterprise

Nutanix Ships Enterprise AI 2.8 With a GA MCP Gateway as NKP 2.19 Rounds Out the Dual-Native Pitch

Nutanix has announced the general availability of Nutanix Enterprise AI (NAI) 2.8 alongside the upcoming release of Nutanix Kubernetes Platform (NKP) 2.19. The updates focus on bridging the gap between legacy virtualized environments and modern containerized AI workloads. By implementing a dual-native architecture, Nutanix aims to allow organizations to run virtual machines and containerized AI

Cerebras CS-4 rack with the side door open showing three wafer-scale compute backpacks stacked vertically
AI  ◇  Enterprise

Cerebras CS-4: Three WSE-3 Turbo Wafers, 750 PFLOPS, and a Claimed 30x Over GPU Racks

Cerebras Systems has officially introduced the CS-4, the fourth generation of its wafer-scale AI supercomputing platform, designed for frontier training and high-concurrency inference workloads. The system is engineered around three newly developed Wafer Scale Engine 3 (WSE-3) Turbo processors, housed in a ground-up redesign called the Nexus rack-scale platform. Cerebras claims the system delivers up

Proxmox VE 9.2 arm64 web interface running on a Raspberry Pi 4 test install
Enterprise  ◇  Software

Proxmox VE 9.2 Adds Official arm64 Support, Fully Backing NVIDIA Grace Hopper and Vera

Proxmox rolled out version 9.2 of its virtualization platform at the start of this month, which adds official support for 64-bit ARM (arm64/aarch64). Previously, Proxmox VE was available only for x86-64 (amd64). With this release, arm64 builds share the same code base, package repositories, and release lifecycle as x86-64. Proxmox VE 9.2 for arm64 is

Aerial view of a Lancium data center campus at dusk, the power-ready footprint NVIDIA is deploying into
AI  ◇  Enterprise

Lancium Adds NVIDIA as Investor and Partner, Targeting Gigawatt AI Factories Across a 15GW Pipeline

Lancium has announced a strategic collaboration and investment from NVIDIA to accelerate the deployment of large-scale accelerated computing infrastructure across Lancium’s data center portfolio. Lancium, a Blackstone portfolio company supported by Blackstone Energy Transition Partners and Blackstone Multi-Asset Investing, will integrate NVIDIA’s full-stack hardware and software architectures directly into its power-ready campus footprint. The collaboration

NVIDIA Groq 3 LPX compute tray diagram: a 1U liquid-cooled tray with eight Groq 3 LPUs, host CPU, BlueField-4 DPU or ConnectX-9 NIC, and 400Gb/s Ethernet
AI  ◇  Enterprise

NVIDIA Groq 3 LPX Enters Full Production: 3,400 Tokens per Second at 100K Context, 256 LP30s per Rack

NVIDIA announced the production release of the NVIDIA Groq 3 LPX, a dedicated interactive inference accelerator built to complement the Vera Rubin NVL72 platform. As enterprise AI workloads shift from raw model pre-training toward real-time reasoning and autonomous agent orchestration, infrastructure requirements are changing. Agentic workflows require iterative, multi-step execution where latency during token generation

Intel Xeon 6+ architecture recap slide showing twelve 18A compute tiles, active base tiles, and EMIB 2.5D packaging
AI  ◇  Enterprise

Intel Hot Chips 2026: 256-Core Diamond Rapids, Crescent Island With 480GB for Inference, and Wildcat Lake at the Edge

At Hot Chips 2026, Intel presented architectural details for three upcoming silicon platforms targeted at enterprise agentic AI workloads spanning data center, inference, and edge tiers. The lineup consists of the next-generation Xeon processor, codenamed Diamond Rapids, for workload orchestration; the Crescent Island data center GPU, dedicated to high-density inference; and the Wildcat Lake SoC,

Enterprise  ◇  Server

IBM’s 2nm Dual-Architecture Mainframe Processor Runs Arm and IBM Z Instructions in the Same Cores

At the Hot Chips conference, IBM revealed the industry’s first dual-architecture mainframe processor, engineered for future generations of IBM Z and LinuxONE enterprise systems. Developed through the joint collaboration between IBM and Arm in April 2026, the processor will allow organizations to run Arm-native Linux operating environments alongside traditional z/OS and Linux on IBM Z