IBM, AMD, and the Department of Energy’s Quantum Science Center at Oak Ridge National Laboratory unveiled a co-design platform for quantum error correction today, built around quantum and classical hardware sitting in the same facility. At IBM’s quantum site in Poughkeepsie, New York, IBM quantum computers including the 120-qubit IBM Quantum Nighthawk processor are co-located with Umbra, an ORNL high-performance computing system built on AMD Instinct MI355X GPUs and 5th Gen AMD EPYC CPUs. The AMD hardware supplies the classical side of the research: decoding, optimization, and software orchestration.
Classical Computing for Quantum Error Correction
Error correcting codes spread quantum information across many physical qubits and run repeated checks for signs of trouble. A classical computer reads each round of checks and works out which qubits went wrong, a job IBM calls decoding, and the decoder has to keep pace with the quantum processor. Today quantum computers and HPC clusters rarely sit in the same facility, so researchers reach the quantum machine through the cloud, run the classical work on separate systems, and connect the two through separate APIs. Every handoff adds delay and limits the experiments a team can run.
The platform puts the two halves next to each other so researchers can test error correction on real quantum hardware inside the workflows it is meant to serve, without building that infrastructure themselves. IBM says the work spans concatenated codes, space-time codes, algorithm-aware decoders, hardware-aware circuit optimization and compilation, and software orchestration in a single stack.
One target is hierarchical error correction, which layers an inner code protecting qubits within a module under an outer code wrapping the inner code’s logical qubits. IBM research puts that approach at a trillion logical operations at a physical error rate of one in a thousand, with decoding happening at each layer.
“With Umbra, we will now test new ideas, evaluate approaches at scale, and build the foundation for more reliable quantum computers,” said Travis Humble, director of the Quantum Science Center.
MI355X GPUs and 5th Gen EPYC CPUs in Umbra
On the quantum side, Nighthawk gives researchers square-lattice connectivity, the highest of any IBM processor architecture, high circuit throughput, and real-time pulse control through IBM’s Quantum System API. Researchers can measure qubits mid-circuit, act on the result in real time, set the exact timing of the signals that protect qubits from noise, and work directly with raw measurement signals. That lets a team compare what each error correction method costs in qubits, time, samples, and classical resources, and find where GPU acceleration helps most.
On the classical side, the MI355X accelerators let researchers train and evaluate decoders at scale, with the EPYC CPUs handling orchestration. Co-location keeps latency low for decoding and for conditional execution, where a quantum program picks its next operation based on a measurement taken mid-computation. Neither IBM nor AMD has published node counts, GPU or CPU quantities, decoding latency figures, or benchmarks for the deployment. AMD has separately described adaptive SoCs and FPGAs for low-latency control and readout and ROCm for orchestrating quantum accelerators as part of its hybrid quantum strategy, but the announcement does not place those in Umbra.
The platform extends earlier work between the three organizations. IBM and ORNL already collaborate through the Quantum Science Center, and the two have shown workloads split between IBM quantum computers and the Frontier supercomputer simulating magnetic materials and calculating molecular configurations of a candidate fusion fuel material. With AMD, IBM is using AMD GPUs to accelerate the classical diagonalization step in sample-based quantum diagonalization, and the two companies have demonstrated an algorithm that decodes quantum errors on AMD chips.
Planned Connections to ORNL Supercomputing
The platform will connect with the Oak Ridge Leadership Computing Facility in Oak Ridge, Tennessee, and ORNL also describes a link to Lux, its AMD-based supercomputer, so quantum work can run as part of the lab’s broader AI and scientific computing infrastructure. IBM and AMD say the collaboration will explore how future generations of AMD compute, networking, and open software can be co-designed with quantum computers. Those connections are described as planned, and the announcement gives no completion date, external access schedule, or general availability milestone for the platform.
The effort lines up with DOE’s Quantum Genesis Mission and its goal of a scientifically relevant quantum computer by 2028. The mission’s Q Competition targets 100 logical qubits running 100,000 hard operations by late 2028, and IBM’s current experiments reach 70 logical qubits and 438 hard operations, a gap of roughly 230x in operation count. IBM says what the teams learn about error correction and HPC workflows will inform IBM Quantum Starling, the fault-tolerant quantum computer it plans to deliver by 2029.
“This co-design platform is an important step toward building the scalable, efficient computing infrastructure needed to make fault-tolerant quantum computing a reality,” said Mark Papermaster, executive vice president and chief technology officer, AMD.
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