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Intel GPU D-Series Packs 480GB LPDDR5X and 1.3 PFLOPS FP8 into a 350W PCIe Card

AI  ◇  Enterprise

Intel today gave Crescent Island its product name at the OCP Global Summit. The Intel GPU D-series is built on the Xe3P architecture and pairs up to 480GB of LPDDR5X with 1.5TB/s of memory bandwidth and 1.3 petaflops of FP8 compute, all inside a 350W air-cooled PCIe card. The 480GB figure applies to partner-built cards; Intel’s own branded card carries 160GB. Intel says customer sampling is underway with server OEMs, ODMs, neoclouds, and independent software vendors. The render Intel released with the news is labeled GPU D270, the first part number we have seen attached to the series.

Intel GPU D-series accelerator render showing the GPU D270 air-cooled PCIe card with Intel branding

Xe3P Architecture Targets Memory-Bound Inference

Intel first described Crescent Island at OCP 2025 and detailed the silicon at Hot Chips in August: 32 Xe cores and 256 XMX engines on Xe3P, with LPDDR5X in place of HBM so the card can drop into existing air-cooled racks. Today’s additions are the product name, the bandwidth and compute figures, and confirmation that customers have sample hardware.

For reference, the PCIe inference accelerator Intel ships today is Gaudi 3, with 128GB of HBM2e at 3.7TB/s, and we went through that card in detail inside the Dell PowerEdge XE7740 in February. Intel paired Crescent Island with Gaudi 3 rack designs when it first showed the GPU at OCP 2025, and the D-series goes the other way on memory, with close to four times the capacity per card at well under half the bandwidth.

According to Intel, a single D-series card can host models up to about 300 billion parameters, and an eight-GPU host scales past one trillion parameters. The company positions the card for sustained multi-tenant inference and long-context agentic workloads, where KV cache growth pushes memory footprint faster than it pushes compute. At 1.5TB/s the card sits well below HBM-class accelerators on bandwidth, and Intel is positioning capacity per watt and per dollar as the figure that matters for decode-heavy serving, ahead of peak bandwidth.

“Inference is becoming the defining AI workload, and enterprises need infrastructure that delivers the right performance at the right cost,” said Anil Nanduri, vice president of AI products and GTM at Intel’s Data Center Group. “With Intel GPU D-series, we’re focused on making high-capacity inference practical to deploy and economical to scale.” The software side rests on the common Xe foundation, which Intel says gives binary portability across its GPU lines, so code developed on Arc Pro cards carries to the D-series without kernel rewrites.

Intel’s stack integrates upstream runtimes and serving frameworks across Xeon hosts and D-series accelerators, with Day 0 support for Meta’s Muse Glimmer, the 30-billion-parameter open-weight model Meta built for local agentic work. The Intel AI for Enterprise Agent Toolkit, which runs on Xeon today, uses a provider-based architecture that will target the D-series as hardware becomes available, so the orchestration layer is in place before the accelerators arrive in volume.

Intel GPU D-series ecosystem slide listing customers and partners including Dell, HPE, Lenovo, Supermicro, Cisco, Red Hat, VMware, vLLM, and Hugging Face

The partner slide Intel showed at the keynote runs to 53 logos across AI natives, appliance vendors, software, neoclouds, and OEMs and ODMs. The server names are the expected ones: Dell, HPE, Lenovo, Supermicro, Cisco, ASUS, ASRock Rack, Giga Computing, MiTAC, Pegatron, QCT, Wistron, Inventec, Compal, and Foxconn. The software list matters more for a card sold on portability, with Red Hat, Canonical, VMware by Broadcom, Nutanix, NetApp, WEKA, vLLM, Hugging Face, Anyscale, and OpenHands all on the board, plus Astera Labs and Cornelis on the interconnect side.

ORv3 Xeon Racks Scale Past 46,000 Cores

Alongside the card, Intel showed rack-scale systems built to the OCP Open Rack v3 specification around Xeon 6+ processors. Intel says the densest configurations reach more than 46,000 cores per rack at a total draw of 133.45kW. The 288-core Xeon 6+ gets there with 160 sockets, which is 80 dual-socket nodes in one rack at about 834W per socket, with the rest of the rack included. Intel positions these racks for the CPU side of an agent pipeline: token routing, retrieval, database lookups, code execution, and keeping accelerators fed with I/O.

Intel Xeon agentic AI rack ecosystem slide showing ORv3 and 19-inch racks from ASRock Rack, ASUS, GIGABYTE, MiTAC, MSI, and Supermicro

The partner slide names ASRock Rack, ASUS, GIGABYTE, MiTAC Computing, MSI, and Supermicro as vendors with systems available today, with three of the six racks shown as ORv3 builds and the rest in 19-inch chassis. Intel says the measure of an AI rack is shifting toward the number of concurrent agents it can sustain at a target latency. “Agentic AI is changing what customers need from their data centers. It’s no longer enough to generate tokens faster. Infrastructure must orchestrate complex workflows, execute tasks, and deliver useful work efficiently at scale,” said Kevork Kechichian, executive vice president and general manager of Intel’s Data Center Group.

Open Adapter Card Work Continues at OCP

Intel also pointed to its work in the OCP Open Adapter Card workgroup, which it formed with AMD, Dell, NVIDIA, and Qualcomm earlier this year. The group is defining a sub-rack accelerator form factor that sits between a standard PCIe card and a full rack-scale system, with standardized mechanical, power, and out-of-band management interfaces so accelerators from different vendors can drop into the same open chassis.

The workgroup’s stated target is high-power adapters for inference and mid-tier training platforms in both 19-inch and 21-inch racks, and Intel and AMD are presenting the spec’s progress at this week’s summit. Intel counts 116 contributions to OCP since 2011, and Nic Dubé’s keynote, “Put Every Prompt in Its Place,” is scheduled for October 13 at 10:30 a.m. PT.

Intel AI

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Harold Fritts

I have been in the tech industry since IBM created Selectric. My background, though, is writing. So I decided to get out of the pre-sales biz and return to my roots, doing a bit of writing but still being involved in technology.